DocumentCode
460944
Title
FlexPath NP: a network processor concept with application-driven flexible processing paths
Author
Herkersdorf, Andreas ; Wild, Thomas ; Ohlendorf, Rainer
Author_Institution
Munich University of Technology, Munich, Germany
fYear
2005
fDate
Sept. 2005
Firstpage
279
Lastpage
284
Abstract
In this paper, we present a new architectural concept for network processors called FlexPath NP. The central idea behind FlexPath NP is to systematically map network processor (NP) application sub-functions onto both SW programmable processor (CPU) resources and (re-)configurable HW building blocks, such that different packet flows are forwarded via different, optimized processing paths through the NP. Packets with well understood, relatively simple processing requirements may even bypass the central CPU complex (AutoRoute). In consequence, CPU processing resources are more effectively used and the overall NP performance and throughput are improved compared to conventional NP architectures. We present analytical performance estimations to quantify the performance advantage of FlexPath (expressed as available CPU instructions for each packet traversing the CPUs) and introduce a platform-based System on Programmable Chip (SoPC) based architecture which implements the FlexPath NP concept.
Keywords
Computer architecture; Coprocessors; DSL; Hardware; Network interfaces; Performance analysis; Permission; Throughput; Very large scale integration; Virtual private networks; IP networking; application-specific architectures; dynamically reconfigurable processors; hardware accelerators; network processors;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware/Software Codesign and System Synthesis, 2005. CODES+ISSS '05. Third IEEE/ACM/IFIP International Conference on
Conference_Location
Jersey City, NJ, USA
Print_ISBN
1-59593-161-9
Type
conf
DOI
10.1145/1084834.1084904
Filename
4076350
Link To Document