DocumentCode
460948
Title
Iterational retiming: maximize iteration-level parallelism for nested loops
Author
Shao, Zili ; Sha, Edwin H -M ; Liu, Meilin ; Xue, Chun
Author_Institution
University of Texas at Dallas
fYear
2005
fDate
Sept. 2005
Firstpage
309
Lastpage
314
Abstract
Nested loops are the most critical sections in many scientific and Digital Signal Processing (DSP)applications.It is important to study effective and efficient transformation techniques to increase parallelism for nested loops.In this paper, we propose a novel technique,iterational retiming,that can satisfy any given timing constraint by achieving full parallelism for iterations in a partition. Theorems and efficient algorithms are proposed for iterational retiming. The experimental results show that iterational retiming is a promising technique for parallel embedded systems.It can achieve 87% improvement over software pipelining and 88%improvement over loop unfolding on average.
Keywords
Application software; Application specific integrated circuits; Computer science; Digital signal processing; Embedded system; Optimal scheduling; Parallel processing; Partitioning algorithms; Permission; Timing; nested loops; optimization; partition; retiming;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware/Software Codesign and System Synthesis, 2005. CODES+ISSS '05. Third IEEE/ACM/IFIP International Conference on
Conference_Location
Jersey City, NJ, USA
Print_ISBN
1-59593-161-9
Type
conf
DOI
10.1145/1084834.1084910
Filename
4076355
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