DocumentCode :
463121
Title :
Design of Active Substrate Noise Canceller using Power Supply di/dt Detector
Author :
Kazama, Taisuke ; Nakura, Toru ; Ikeda, Makoto ; Asada, Kunihiro
Author_Institution :
Dept. of Electron. Eng., Tokyo Univ.
fYear :
2007
fDate :
23-26 Jan. 2007
Firstpage :
100
Lastpage :
101
Abstract :
As the growing demand of mixed-signal designs as A/D, D/A and PLL integrated with large scale digital circuits, substrate noise becomes serious concern. On the other hand, the remedies using guard ring and decoupling capacitor do not have enough efficiency against high frequency noise due to their parasitic component. To suppress the impact of substrate noise, on-chip active noise cancelling technique using di/dt detector has been proposed (Nakura et al., 2004) and (Nakura et al., 2006). This paper introduces an exapmle design of feedforward active substrate noise canceling technique using multiple power supply di/dt detector and demonstrates the noise cancelling results by the measurement of 0.35 mum CMOS test chip.
Keywords :
CMOS integrated circuits; detector circuits; integrated circuit noise; interference suppression; mixed analogue-digital integrated circuits; power supply circuits; 0.35 micron; CMOS chip; di/dt detector; feedforward active substrate noise canceling; mixed-signal designs; power supply; Active noise reduction; Capacitors; Detectors; Digital circuits; Frequency; Large scale integration; Noise cancellation; Phase locked loops; Power measurement; Power supplies;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2007. ASP-DAC '07. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
1-4244-0629-3
Electronic_ISBN :
1-4244-0630-7
Type :
conf
DOI :
10.1109/ASPDAC.2007.357960
Filename :
4196006
Link To Document :
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