Title :
A New Class of High Performance FFTs
Abstract :
FPGA implementations of block floating point (BFP), streaming, 256-point and 1024-point fast Fourier transform (FFT) circuits are described as examples of a new architectural approach that provides better performance, flexibility, and functionality than commercially available pipelined FFTs. It is based on a matrix formulation of the discreet Fourier transform (DFT) that converts the direct transform into structured sets of arithmetically simple 4-point transforms that are computed on a systolic array. This circuit architecture permits transform lengths that are not a power-of-two, can do 2-D as well as 1-D transforms, is scalable, has low computational latency and utilizes BFP and floating point (FP) features to provide high dynamic range. Circuit comparisons are made with a commercially available pipelined FFT.
Keywords :
array signal processing; discrete Fourier transforms; field programmable gate arrays; matrix algebra; DFT; FFT; FPGA implementations; block floating point; circuit architecture; computational latency; discrete Fourier transform; fast Fourier transform; floating point features; matrix formulation; systolic array; Computer architecture; Delay; Discrete Fourier transforms; Dynamic range; Fast Fourier transforms; Field programmable gate arrays; Flexible printed circuits; Fourier transforms; Matrix converters; Systolic arrays; Discrete Fourier transforms; Field programmable gate arrays; High-speed electronics; Systolic arrays;
Conference_Titel :
Acoustics, Speech and Signal Processing, 2007. ICASSP 2007. IEEE International Conference on
Conference_Location :
Honolulu, HI
Print_ISBN :
1-4244-0727-3
DOI :
10.1109/ICASSP.2007.366162