Title :
A High-Performance Hardwired CABAC Decoder
Author :
Jian-wen Chen ; Youn-Long Lin
Author_Institution :
Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Abstract :
We present a high-performance hardwired context-based adaptive binary arithmetic decoder (CABAD) for H.264/AVC. Based on an analysis of decoding time for different types of syntax elements, we propose three parallel processing techniques. Our decoder takes 309 clock cycles to decode a typical I-type macroblock. It needs to run at only 45 MHz for 1080HD application. Therefore, our architecture is suitable for low power mobile applications.
Keywords :
adaptive codes; arithmetic codes; binary codes; decoding; parallel processing; video coding; H.264-AVC; context-based adaptive binary arithmetic decoder; hardwired CABAC decoder; low power mobile applications; parallel processing techniques; syntax elements; Automatic voltage control; Clocks; Computer science; Decoding; Digital arithmetic; Entropy; IEC standards; ISO standards; Parallel processing; Video coding; CABAC Decoder; H.264/AVC;
Conference_Titel :
Acoustics, Speech and Signal Processing, 2007. ICASSP 2007. IEEE International Conference on
Conference_Location :
Honolulu, HI
Print_ISBN :
1-4244-0727-3
DOI :
10.1109/ICASSP.2007.366166
