Analysis of the Matrix Processing (MxP) Architecture

Author

Girija, L. ; Spanias, A.S.

Volume

2

fYear

2007

fDate

15-20 April 2007

Abstract

In this paper, we describe and evaluate a new DSP architecture called the matrix processing (MxP™). MxP exploits data parallelism using hardwired matrix operations and instructions. The MxP matrix computation capabilities are optimized for multidimensional transforms and filtering. A detailed analysis of the MxP performance, in terms of precision, execution time, and instruction memory requirements, is presented. We focus particularly on matrix and vector manipulations of the type embedded in video processing standards, e.g., filtering, DCT, and motion estimation. We present comparison tables of the performance of the MxP with other widely used DSPs such as the TI TMS320c55x™, and the TI TMS320c64x™.

Keywords

digital signal processing chips; matrix algebra; transforms; DCT; DSP architecture; MxP matrix computation; TI TMS320c55x; TI TMS320c64x; data parallelism; hardwired matrix operations; instruction memory requirements; matrix processing architecture; motion estimation; multidimensional transforms; vector manipulations; video processing standards; Clocks; Computer architecture; Coprocessors; Digital signal processing; Discrete cosine transforms; Filtering; ISO standards; Motion estimation; Signal processing algorithms; Streaming media; DSP architectures; video standards;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech and Signal Processing, 2007. ICASSP 2007. IEEE International Conference on

Conference_Location

Honolulu, HI

ISSN

1520-6149

Print_ISBN

1-4244-0727-3

Type

conf

DOI

10.1109/ICASSP.2007.366251

Filename

4217424