DocumentCode :
464723
Title :
A Novel Active Decoupling Capacitor Design in 90nm CMOS
Author :
Meng, Xiongfei ; Arabi, Karim ; Saleh, Resve
Author_Institution :
Dept. of Electr. & Comput. Eng., British Columbia Univ., Vancouver, BC
fYear :
2007
fDate :
27-30 May 2007
Firstpage :
657
Lastpage :
660
Abstract :
On-chip decoupling capacitors (decaps) are generally used to reduce power supply noise. Passive decap designs are reaching their limits in 90nm CMOS technology due to higher operating frequency, lower supply voltage, increased concerns on electrostatic discharge (ESD) reliability and thin-oxide gate leakage. In this paper, a novel active decap design is proposed to provide better noise reduction than the passive decaps. The active decap is analyzed for ESD reliability and process/temperature variation adaptability. It is implemented in a 1.0V-core 90nm process with a total area of 0.168mm2 and standby power of 3.0mW.
Keywords :
CMOS integrated circuits; capacitors; circuit noise; integrated circuit design; interference suppression; power supply circuits; reliability; 1 V; 3.0 mW; 90 nm; CMOS; active decoupling capacitor design; electrostatic discharge reliability; higher operating frequency; lower supply voltage; on-chip decoupling capacitors; power supply noise reduction; thin-oxide gate leakage; CMOS technology; Capacitance; Capacitors; Electrostatic discharge; Frequency; Noise reduction; Power grids; Power supplies; Switches; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
Type :
conf
DOI :
10.1109/ISCAS.2007.377894
Filename :
4252720
Link To Document :
بازگشت