DocumentCode :
464726
Title :
Beamforming MIMO Receiver with Reduced Hardware Complexity
Author :
Oliaei, Omid
Author_Institution :
Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA
fYear :
2007
fDate :
27-30 May 2007
Firstpage :
669
Lastpage :
672
Abstract :
We present two-antenna receiver architecture with analog beamforming capability while allowing for multiple data-stream communication, as required in a genuine MIMO receiver. The proposed superheterodyne architecture advantageously combines the concepts of analog beamforming and MIMO communication, leading to relaxed noise and linearity requirements as well as lower power consumption for the IF filters and data converters.
Keywords :
MIMO communication; antennas; data communication; filters; low-power electronics; receivers; IF filters; MIMO communication; MIMO receiver; analog beamforming; antenna receiver architecture; data converters; hardware complexity; lower power consumption; multiple data-stream communication; superheterodyne architecture; Array signal processing; Computer architecture; Digital filters; Energy consumption; Hardware; Linearity; MIMO; Receiving antennas; Signal generators; Signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
Type :
conf
DOI :
10.1109/ISCAS.2007.377897
Filename :
4252723
Link To Document :
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