Title :
High performance processor array for image processing
Author :
Foldesy, Peter ; Zarándy, Ákos ; Rekeczky, Csaba ; Roska, Tamás
Author_Institution :
Comput. & Autom. Res. Inst., Hungarian Acad. of Sci., Budapest
Abstract :
The ASIC implementation of a digital cellular visual microprocessor architecture is introduced. The processor array is constructed of simple, locally interconnected 8 bit microprocessors, operating in an extended SIMD mode. The processor array can be equipped with on-chip photo diode array, using 3D integration technology
Keywords :
image processing; microprocessor chips; parallel processing; photodiodes; 3D integration technology; ASIC implementation; SIMD mode; digital cellular visual microprocessor architecture; high performance processor array; image processing; on-chip photo diode array; Analog computers; Arithmetic; Filters; High performance computing; Image processing; Morphology; Pixel; Sensor arrays; Silicon; Xenon;
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
DOI :
10.1109/ISCAS.2007.378260
