A Prototyping Co-design Platform with A Simplified Architecture for Video Codec Implementation

Author

Qiu, Yifeng ; Badawy, Wael ; Turney, Robert

Author_Institution

Dept. of Electr. & Comput. Eng., Calgary Univ., Alta.

fYear

2007

fDate

27-30 May 2007

Firstpage

1220

Lastpage

1224

Abstract

This paper presents an integrated hardware-accelerated co-design platform with novel and simplified system architecture for MPEG-4/H.264 video codec implementation. The generic prototyping hardware modules are utilized for data communications, signal exchange and video IP integration based on the concept of virtual socket between a host and reconfigurable FPGA co-processor. The hardware implementation for MPEG-4/H.264 video codec can be therefore facilitated and verified on this co-design platform system

Keywords

coprocessors; data communication; field programmable gate arrays; software prototyping; video codecs; MPEG-4/H.264 video codec; data communications; integrated hardware-accelerated co-design platform; prototyping co-design platform; reconfigurable FPGA co-processor; signal exchange; simplified architecture; video IP integration; video codec implementation; virtual socket; Computer architecture; Digital signal processing; Embedded software; Field programmable gate arrays; Hardware; MPEG 4 Standard; Prototypes; Reduced instruction set computing; Sockets; Video codecs;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on

Conference_Location

New Orleans, LA

Print_ISBN

1-4244-0920-9

Electronic_ISBN

1-4244-0921-7

Type

conf

DOI

10.1109/ISCAS.2007.378330

Filename

4252865