DocumentCode
464940
Title
Reducing Energy of DRAM/Flash Memory System by OS-controlled Data Refresh
Author
Moshnyaga, Vasily G. ; Vo, Hua ; Reinman, Glenn ; Potkonjak, Miodrag
Author_Institution
Dept. Electron. Eng. & Comput. Sci., Fukuoka Univ.
fYear
2007
fDate
27-30 May 2007
Firstpage
2108
Lastpage
2111
Abstract
This paper presents a new approach to reduce energy consumption of DRAM/flash memory system by lowering the frequency of DRAM refreshes. The approach is based on two ideas: (1) a DRAM based swap-cache that reduces the number of writes to the flash memory by keeping dirty pages as long as possible; and (2) OS-controlled page allocation/aging policy that stops refreshing for banks, whose pages are clean and not accessed for a long time. Simulations show that the approach can reduce the DRAM refresh energy by 59-74% and the overall energy of DRAM/flash memory system by 8-24% without increase in the execution.
Keywords
DRAM chips; cache storage; flash memories; operating systems (computers); DRAM; OS-controlled data refresh; OS-controlled page allocation; aging policy; flash memory system; reduce energy consumption; swap-cache; Aging; Batteries; Computer science; Energy consumption; Flash memory; Frequency; Memory management; Power engineering and energy; Random access memory; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location
New Orleans, LA
Print_ISBN
1-4244-0920-9
Electronic_ISBN
1-4244-0921-7
Type
conf
DOI
10.1109/ISCAS.2007.378515
Filename
4253086
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