Area and Time Efficient Cellular Non-linear Networks

The use of a reduced set of multipliers or coefficient circuits on cellular processor arrays leads to time and area efficient solutions. The reduced set of multipliers is achievable with the so-called split&shift (S&S) methodology. Data resultant from applying such a methodology to implementations with cellular non-linear networks (CNN) reported in the literature are presented. Also, pixel-level snakes (PLS) are used as benchmark for a more in-depth analysis of our methodology.