In Vitro Epileptic Seizure Prediction Microsystem

Author

Aziz, J. ; Karakiewicz, R. ; Genov, R. ; Chiu, A.W.L. ; Bardakjian, B.L. ; Derchansky, M. ; Carlen, P.L.

Author_Institution

Dept. of Electr. & Comput. Eng., Toronto Univ., Ont.

fYear

2007

fDate

27-30 May 2007

Firstpage

3115

Lastpage

3118

Abstract

The architecture and VLSI implementation of an epileptic seizure prediction microsystem are presented. The microsystem comprises a neural recording interface and a seizure prediction processor. The two functional blocks have been prototyped in a 0.35 mum CMOS technology and experimentally characterized. The integrated microsystem is validated in predicting the onsets of seizures off line in an in vitro epilepsy model of recurrent spontaneous seizures in the hippocampus of mice.

Keywords

CMOS integrated circuits; VLSI; diseases; micromechanical devices; microprocessor chips; neural nets; 0.35 micron; CMOS technology; VLSI implementation; epileptic seizure prediction microsystem; in vitro epilepsy model; mice hippocampus; neural recording interface; seizure prediction processor; Biomedical engineering; Brain; CMOS technology; Epilepsy; In vitro; Low pass filters; Medical treatment; Neuroscience; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on

Conference_Location

New Orleans, LA

Print_ISBN

1-4244-0920-9

Electronic_ISBN

1-4244-0921-7

Type

conf

DOI

10.1109/ISCAS.2007.378090

Filename

4253338