DocumentCode
465082
Title
Combined Decoding and Flexible Transform Designs for Effective H.264/AVC Decoders
Author
Chao, Yi-Chih ; Wei, Shih-Tse ; Yang, Jar-Ferr ; Liu, Bin-Da
Author_Institution
Dept. of Electr. Eng., National Cheng Kung Univ., Tainan
fYear
2007
fDate
27-30 May 2007
Firstpage
3135
Lastpage
3138
Abstract
This paper proposes combined decoding architecture and high-throughput flexible transform design to effectively decode the residual data for H.264/AVC decoders. The inverse quantization (IQ) procedure is combined with context-based adaptive variable length coding (CAVL) decoder to efficiently achieve the simplification. Besides, the flexible transform architecture is also proposed for effective computation of all transforms needed in H.264/AVC decoders. Since all the transforms are realized in the same architecture, the flexible transform design with the throughput of 8 pixels/sec needs fewer logic gate counts. Simulation results show that the implemented gate count is 18.6k and the maximum operating frequency is 125 MHz. For real-time requirements, this proposed design achieves 4VGA (1280times960)@30 frames/sec in the worst case.
Keywords
logic gates; real-time systems; variable length codes; video coding; H.264/AVC decoders; combined decoding; context-based adaptive variable length coding; flexible transform designs; inverse quantization; logic gate counts; real-time requirements; Arithmetic; Automatic voltage control; Chaos; Computer architecture; Context modeling; Decoding; Electronic mail; Quadratic programming; Quantization; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location
New Orleans, LA
Print_ISBN
1-4244-0920-9
Electronic_ISBN
1-4244-0921-7
Type
conf
DOI
10.1109/ISCAS.2007.378095
Filename
4253343
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