DocumentCode
465186
Title
Evaluating Network-on-Chip for Homogeneous Embedded Multiprocessors in FPGAs
Author
Freitas, Henrique C. ; Colombo, Dalton M. ; Kastensmidt, Fernanda L. ; Navaux, Philippe O A
Author_Institution
Parallel & Distributed Process. Group, Univ. Fed. do Rio Grande do Sul, Porto Alegre
fYear
2007
fDate
27-30 May 2007
Firstpage
3776
Lastpage
3779
Abstract
This paper presents performance and area evaluation of a homogeneous multiprocessor communication system based on network-on-chip (NoC) in FPGA platforms. Two homogenous chip multiprocessor proposals were designed and compared for Xilinx FPGAs using MicroBlaze processors: one based on NoC and the other based on shared memory/bus. One of the main findings is the communication performance evaluation of NoC for parallel computing applications. The comparison results show that an efficient implementation of NoC on FPGA can improve communication speed by up to seven times with low area overhead, according to the data size and the number of processors connected to the network.
Keywords
embedded systems; field programmable gate arrays; microprocessor chips; network-on-chip; telecommunication; FPGA; MicroBlaze processors; Xilinx; embedded communication system; homogeneous multiprocessors; network-on-chip; parallel computing; Application software; Computer architecture; Delay; Field programmable gate arrays; Joining processes; Microprocessors; Network-on-a-chip; Proposals; Random access memory; Reduced instruction set computing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location
New Orleans, LA
Print_ISBN
1-4244-0920-9
Electronic_ISBN
1-4244-0921-7
Type
conf
DOI
10.1109/ISCAS.2007.378783
Filename
4253503
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