DocumentCode
465295
Title
High Performance and Low Power Electronics on Flexible Substrate
Author
Li, Jing ; Kang, Kunhyuk ; Bansal, Aditya ; Roy, Kaushik
Author_Institution
Purdue Univ., West Lafayette
fYear
2007
fDate
4-8 June 2007
Firstpage
274
Lastpage
275
Abstract
We propose a design and optimization methodology for high performance and ultra low power digital applications on flexible substrate using low temperature polycrystalline silicon thin film transistor (LTPS TFT). We show that by using ultra-thin bodies and minimizing the mid-gap trap density by hydrogenation, LTPS TFTs (in 200 nm technology) can achieve higher performance than standard TFTs. We also demonstrate that it can be a promising candidate for both sub-threshold and super-threshold operation with performances comparable to contemporary bulk silicon. However, due to grain boundaries (GBs), there can be large intrinsic variations in such devices. Hence, there is a need for GB-tolerant design. Integration of proposed digital electronics in conjunction with conventional display application of LTPS TFTs on flexible substrates (system-on-panel) will open up plethora of new and interesting applications.
Keywords
flexible electronics; low-power electronics; semiconductor device models; silicon; substrates; thin film transistors; GB-tolerant design; flexible substrate; grain boundaries; low power electronics; polycrystalline silicon thin film transistor; ultra low power digital application; Design methodology; Design optimization; Displays; Electron traps; Grain boundaries; Low power electronics; Silicon; Substrates; Temperature; Thin film transistors; Design; Experimentation; Grain Boundary (GB); Thin Film Transistor (TFT);
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2007. DAC '07. 44th ACM/IEEE
Conference_Location
San Diego, CA
ISSN
0738-100X
Print_ISBN
978-1-59593-627-1
Type
conf
Filename
4261189
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