Title :
Modeling the Function Cache for Worst-Case Execution Time Analysis
Author :
Kirner, Raimund ; Schoeberl, Martin
Author_Institution :
Tech. Univ., Vienna
Abstract :
Static worst-case execution time (WCET) analysis is done by modeling the hardware behavior. In this paper we describe a WCET analysis technique to analyze systems with function caches, a special kind of instruction cache that caches whole functions only. This cache was designed with the aim to be more predictable for the worst-case than existing instruction caches. Within this paper we developed a cache analysis technique for the function cache. One of the new concepts of this analysis technique is the local persistence analysis, which allows to precisely model the function cache.
Keywords :
cache storage; program diagnostics; cache analysis; function cache modeling; hardware behavior modeling; instruction cache; local persistence analysis; static worst-case execution time analysis; systems analysis; Contracts; Filling; Flow graphs; Hardware; Java; Performance analysis; Permission; Real time systems; System-on-a-chip; Timing; Performance; Verification; WCET; cache analysis; function cache; worst-case execution time;
Conference_Titel :
Design Automation Conference, 2007. DAC '07. 44th ACM/IEEE
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-59593-627-1