Verification Coverage: When is Enough, Enough?

For EDA users worldwide, the functional verification of complex chips poses a daunting challenge that consumes not just increasingly precious amounts of time, but also limited resources and available budget. The introduction of new tools has driven new powerful new methodologies, and spurred further debate on the issue of coverage interoperability - of heterogeneous verification tools and their respective handling of coverage data. New methodologies hold promise for better decision-making, as does a baseline standard for coverage interoperability. With the various new tools and technologies that have arrived on the scene has come support of flows that can lead to better functional verification decisions and higher quality products.