Automated Design Flow for Multi-Context FPGAs

Multi-context FPGAs are reconfigurable FPGAs that store two or more on-chip configuration memories named contexts. Unlike regular reconfigurable FPGAs, where a new bit-stream is downloaded from a limited bandwidth external memory, multi-context devices can be partially or fully reconfigured from their internal configuration memories by means of a fast context swapping. Their very fast reconfiguration time permits mapping virtual circuits efficiently, that is, a time-multiplexed execution of circuit partitions that behaves as the circuit statically implemented on a larger capacity FPGA. The main drawback of multi-context FPGAs is the lack of commercial devices and design tools to take profit from them. This paper shows an automated design flow developed for designing and simulating virtual circuits mapped on multi-context FPGAs.