A 16-bit CMOS Digitally Controlled Oscillator Using a Novel Control Scheme

A Novel 16-bit CMOS digitally controlled oscillator (DCO) is described. This CMOS DCO design is based on a delay programmable differential latch which yields improved phase noise characteristics. Simulations of a 4-stage CMOS DCO using a 0.5mum Agilent CMOS process parameters achieved a controllable frequency range of 750 MHz - 1.6 GHz with a monotone tuning range of around 1 GHz. Monte Carlo simulations indicate that the time-period jitter due to random supply voltage fluctuations is under 250 ps for worst-case considerations. Also, phase noise was found to be in the range of -175 dBc @ a frequency of 600 KHz from the carrier at 1.5 GHz (for digital control word of 1512H) after numerous iterations of Monte Carlo simulations. FFT analysis indicate a THD (Total Harmonic Distortion) of around -57 dB for the DCO output signal. Experimental fabrication using the Agilent 0.5mum 3M1P CMOS process technology was used for the verification of the functional operation of the DCO. This CMOS design would thus provide considerable performance enhancement in digital PLL applications.