The Design of LVDS Transmitter with ESD Protection Circuit using BiCMOS Technologies

This paper presents the design of LVDS (low-voltage-differential-signaling) transmitter for Gb/s-per-pin operation using BiCMOS technology. To reduce chip area, LVDS transmitter´s switching devices are replaced with lateral bipolar devices. Also the proposed LVDS transmitter is operated at 1.8 V power supply. Its maximum data rate is 2.8 Gb/s approximately. In addition, an ESD protection circuit is designed for ESD protection. This structure has low latch-up phenomenon by using turn on/off character of N-channel MOSFET and low triggering voltage by turning P-channel MOSFET in the SCR structure. The triggering voltage is simulated to 4.5 V-8 V as the variation of gate length. Finally, the high speed I/O interface circuit with the low triggered ESD protection device is designed in a single-chip.