DocumentCode :
467139
Title :
Delta-Sigma ADC for Ternary Code System (Part I: Modulator Realization)
Author :
Korotkov, A.S. ; Morozov, D.V. ; Pilipko, M.M. ; Sinha, Amitabha
Author_Institution :
St. Petersburg State Polytech. Univ., St. Petersburg
Volume :
1
fYear :
2007
fDate :
13-14 July 2007
Firstpage :
1
Lastpage :
4
Abstract :
The paper presents realization of the delta-sigma modulator of analog-to-digital converter (ADC) for ternary code signal processing. The modulator corresponds to the second order structure which was simulated on the circuit level. The evaluation demonstrates following characteristics of the modulator: frequency range is about 1 MHz, signal-to-noise ratio (SNR) is 60 dB, and power consumption is about 20 mW.
Keywords :
analogue-digital conversion; delta-sigma modulation; modulators; signal processing; ternary codes; delta-sigma analog-to-digital converter; frequency 1 MHz; modulator realization; power 20 mW; ternary code signal processing system; Delta modulation; Digital filters; Dynamic range; Energy consumption; Equations; Finite impulse response filter; Modulation coding; Multivalued logic; Power engineering and energy; Quantization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Circuits and Systems, 2007. ISSCS 2007. International Symposium on
Conference_Location :
Iasi
Print_ISBN :
1-4244-0969-1
Electronic_ISBN :
1-4244-0969-1
Type :
conf
DOI :
10.1109/ISSCS.2007.4292653
Filename :
4292653
Link To Document :
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