Digital Circuit Design Using CMOS Transistor Model for Development in ASIC/SOC Technology

With the advent in VLSI technology and design, the challenge to design the complex ICs and maximizing productivity in the methodology has grown. In order to meet market expectation of cost, time, and quality, it is indispensable to reuse pre-defined blocks called intellectual property (IP) modules in application specific IC (ASIC) / system-on-chip (SOC) designs. At the same time, improving the quality and attributes of these basic blocks has also become essential. This paper aims at describing a basic complementary metal oxide semiconductor (CMOS) transistor model, and its implementation to design and analyze efficient basic digital circuits like logic gates and arithmetic circuits. These concepts have been experimented through some famous EDA tools like PSpice and Tanner tool. The result demonstrates the effectiveness of these circuits as compared to their conventional counterparts, in the development of ASIC/SOC technology and forces the justification to explore its future potentials and prospects.