DocumentCode :
46764
Title :
Improving the Quality of Epitaxial Foils Produced Using a Porous Silicon-based Layer Transfer Process for High-Efficiency Thin-Film Crystalline Silicon Solar Cells
Author :
Radhakrishnan, Hariharsudan Sivaramakrishnan ; Martini, R. ; Depauw, Valerie ; Van Nieuwenhuysen, Kris ; Debucquoy, Maarten ; Govaerts, Jonathan ; Gordon, I. ; Mertens, Robert ; Poortmans, Jozef
Author_Institution :
IMEC, Leuven, Belgium
Volume :
4
Issue :
1
fYear :
2014
fDate :
Jan. 2014
Firstpage :
70
Lastpage :
77
Abstract :
A porous silicon-based layer transfer process to produce thin (30-50 μm) kerfless epitaxial foils (epifoils) is a promising approach toward high-efficiency solar cells. For high efficiencies, the epifoil must have high minority carrier lifetimes. The epifoil quality depends on the properties of the porous layer since it is the template for epitaxy. It is shown that by reducing the thickness of this layer and/or its porosity in the near-surface region, the near-surface void size is reduced to <;65 nm and in certain cases achieve a 100 nm-thick void-free zone below the surface. Together with better void alignment, this allows for a smoother growth surface with a roughness of <;35 Å and reduced stress in the porous silicon. These improvements translate into significantly diminished epifoil crystal defect densities as low as ~420 defects/cm 2. Although epifoils on very thin porous silicon were not detachable, a significant improvement in the lifetime (diffusion length) of safely detachable n-type epifoils from ~85 (~300 μm) to ~195 μs (~470 μm) at the injection level of 10 15/cm 3 is achieved by tuning the porous silicon template. Lifetimes exceeding ~350 μs have been achieved in the reference lithography-based epifoils, showing the potential for improvement in porous silicon-based epifoils.
Keywords :
carrier lifetime; crystal defects; elemental semiconductors; epitaxial layers; foils; porosity; porous semiconductors; silicon; solar cells; surface roughness; Si; crystal defect densities; diffusion length; high-efficiency thin-film crystalline silicon solar cells; minority carrier lifetimes; near-surface void size; porosity; porous silicon-based layer transfer process; size 100 nm; size 30 mum to 50 mum; stress; thin kerfless epitaxial foils; void alignment; Epitaxial growth; Rough surfaces; Silicon; Stress; Substrates; Surface morphology; Surface roughness; Crystal defects; epitaxy; layer transfer; minority carrier lifetime; porous silicon; stress; surface roughness;
fLanguage :
English
Journal_Title :
Photovoltaics, IEEE Journal of
Publisher :
ieee
ISSN :
2156-3381
Type :
jour
DOI :
10.1109/JPHOTOV.2013.2282740
Filename :
6627940
Link To Document :
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