Readout electronics for flat panel PSPMT with multiple CPU and full parallel acquisition

The PSPMT readout systems that are generally found in technical literature are usually based on two different principles: those with single channel acquisition and those in which the channels are connected together by a resistive chain. In this paper we present a single channel acquisition readout electronics based on easily available commercial ICs. The aim of this study is to acquire valuable information for the development of an application specific integrated circuit (ASIC). The setup is a matrix of 4 Hamamatsu H8500 PSPMTs, assembled with a 10cm x 10cm LaBr3:Ce crystal. Due to the high number of channels (256) and to the connector layout, 16 different PCBs with one standalone CPU each were used in order to calculate, with a parallel algorithm, the collected charge center of gravity and to download data to a PC. The system is capable of 250 KSample/sec, a rate that is well beyond the common rates found in these kind of applications and allows to avoid dead times between the acquisition of a meaningful event and the next.