DocumentCode
469585
Title
AFTER, an ASIC for the readout of the large T2K time projection chambers.
Author
Baron, P. ; Delagnes, E. ; Calvet, D. ; De La Broise, X. ; Delbart, A. ; Druillole, F. ; Fallou, J.-L. ; Mazzucato, E. ; Monmarthe, E. ; Pierre, F. ; Sarrat, A. ; Zonca, E. ; Zito, M.
Author_Institution
CEA, Gif-sur-Yvette
Volume
3
fYear
2007
fDate
Oct. 26 2007-Nov. 3 2007
Firstpage
1865
Lastpage
1872
Abstract
The T2K (Tokai-to-Kamioka) experiment is a long baseline neutrino oscillation experiment in Japan, for which a near detector complex (ND280), used to characterized the beam, will be built 280 m from the target in the off-axis direction of the neutrino beam produced using the 50 GeV proton synchrotron of J-PARC (Japan Proton Accelerator Research Complex). The central part of the ND280 is a detector including 3 large Time Projection Chambers based on Micromegas gas amplification technology with anodes pixilated into about 125,000 pads and requiring therefore compact and low power readout electronics. A 72-channel front-end Application Specific Integrated Circuit has been developed to read these TPCs. Each channel includes a low noise charge preamplifier, a pole zero compensation stage, a second order Sallen-Key low pass filter and a 511-cell switched capacitor array. This electronics offers a large flexibility in sampling frequency (50 MHz max.), shaping time (16 values from 100 ns & 2 mus), gain (4 gains from 120 fC to 600 fC), while taking advantage of the relatively low physics events rate of 0.3 Hz. Fabricated in 0.35 mum CMOS technology, the prototype has been validated and meets all the requirements for the experiment so that mass production will be launched at the end of 2007.
Keywords
application specific integrated circuits; nuclear electronics; preamplifiers; readout electronics; time projection chambers; AFTER; Micromegas gas amplification technology; Tokai-to-Kamioka experiment; front-end application specific integrated circuit; large T2K time projection chambers; long baseline neutrino oscillation experiment; low noise charge preamplifier; low power readout electronics; pole zero compensation stage; second order Sallen-Key low pass filter; switched capacitor array; Anodes; Application specific integrated circuits; CMOS technology; Detectors; Integrated circuit technology; Neutrino sources; Particle beams; Proton accelerators; Readout electronics; Synchrotrons; CMOS; Front-end; Mixed analog-digital integrated circuits; electronics;
fLanguage
English
Publisher
ieee
Conference_Titel
Nuclear Science Symposium Conference Record, 2007. NSS '07. IEEE
Conference_Location
Honolulu, HI
ISSN
1095-7863
Print_ISBN
978-1-4244-0922-8
Electronic_ISBN
1095-7863
Type
conf
DOI
10.1109/NSSMIC.2007.4436521
Filename
4436521
Link To Document