Development of a low-noise analog front-end ASIC for CdTe detectors

We developed a low-noise analog front-end ASIC for CdTe detectors. The ASIC was designed on the basis of Open- IP, an LSI circuit library, and fabricated with a TSMC 0.35- mum CMOS technology. The ASIC contains eight identical channels, each of which consists of a charge-sensitive amplifier, slow and fast CR-RC shapers, comparator, and sample-and-hold circuit. The initial evaluations were performed with the ASIC packaged in a plastic mold and held in a burn-in socket. The equivalent noise level of a typical channel reached 188 e + 7.5 e /pF (rms). In order to minimize a parasitic capacitance from an assembly issue and demonstrate further low-noise performance, we designed a front-end carrier board and evaluated the performance of the bare ASIC. As a result, the typical noise level for the input capacitance of OpF improved to 130 e and the minimum noise level reached 110 e (rms) at -20degC. We also combined the ASIC with a Shottky CdTe diode detector and obtained a gamma- ray spectrum. The energy resolutions were 2.43 keV (FWHM) for 60 keV gamma-rays and 2.26 keV (FWHM) for 17.6 keV gamma-rays at -20degC.