Stability Analysis of a Charge Pump Phase-Locked Loop Using Autonomous Difference Equations

The CP-PLL is a common component in modern communication circuits. It is used among others in frequency synthesis, synchronization and clock and data recovery. Since the CP-PLL constitutes a mixed-signal architecture and a nonlinear behavior, it is difficult to use general theories to characterize the dynamic behavior of this feedback system. Therefore, linear continuous-time and linear discrete-time models of the CP-PLL are traditionally applied to define the stability of the system. The disadvantage of these linear models is the early linearization which eliminates the possibility of considering the effect of nonlinearities in the loop. Another drawback of the linear models is the limited validity due to the assumption of very small phase errors. To overcome these limitations, an event-driven model is utilized in this paper to introduce a set of autonomous difference equations. These autonomous difference equations are used to derive a reliable stability condition of the CP-PLL. Although this approach is applicable for arbitrary ordered CP-PLLs, a third order loop is considered to show the suitability of this approach. To assess the obtained stability boundary, it is compared to the well-established stability criterion of Gardner as well as to the often used Empirical Boundary by a set of numerous simulations.