Development of an ASIC for multi-readout X-ray CCDs

X-ray CCDs have poor timing resolution of several seconds. Since the pixel rate is limited to keep readout noise low, we develop an application specific integrated circuit (ASIC) for multi-readout of X-ray CCDs in order to make the readout circuits small and the power consumption low. Our ASIC with the size of 3 mm times 3 mm has four channels, each channel converts the CCD outputs to 12 bits data employing a delta-sigma (DeltaSigma) digitization. The fabrication process is a 0.35 mum CMOS technology provided by Taiwan semiconductor manufacturing company (TSMC). The equivalent input noise is about 34 muV and the power consumption is about 70 mW per chip at the pixel rate of 44 kHz. When we use the X-ray CCD whose sensitivity is 3.5 muV/e^- , the equivalent noise charge is 10 e^- and the energy resolution is 164 eV(FWHM) at 5.9 keV.