DocumentCode
472623
Title
A 1μm CMOS technology optimized for 1 mega bit DRAMs
Author
Siu, W.
Author_Institution
Intel Corporation, Aloha, Oregon
fYear
1985
fDate
14-16 May 1985
Firstpage
8
Lastpage
9
Abstract
This paper represents the outcome of a col laboratIve effort among a number of people In the Portland Technology Development Department of Intel whose names are too numerous to mention. SpecIfical Iy, the 1 Mb Process Integratlon Group, the lMb Device and Design groups, and the Basic Technology Groups have all directly participated In this project. Other groups that provided support Include Rollability Engineering, Product Engineering, and Fab Manufacturtng.
Keywords
CMOS technology; DRAM chips; Dielectric substrates; Glass; Integrated circuit interconnections; Isolation technology; Manufacturing; Production; Reliability engineering; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 1985. Digest of Technical Papers. Symposium on
Conference_Location
Kobe, Japan
Print_ISBN
4-930813-09-3
Type
conf
Filename
4480277
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