Title :
Gate Oxide Thinning Limit Influenced by Gate Materials
Author :
Itsumi, Manabu ; Muramoto, Susumu
Author_Institution :
Atsugi Electrical Communication Laboratory, NTT Atsugi-shi, Kanagawa, 243-01, Japan
Abstract :
N-type poly Si has no serious influence on thin oxides down to about 30 Ã
. For a boron-doped poly-Si gate, however, current increase characterized by negative gate bias is found. For an Mo gate, gate oxide surface layer of about 20 Ã
next to the gate are deteriorated. By minimizing boron diffusion from a boron-doped poly-Si and Mo penetration during Mo gate formation, both gates will be of practical use for thin gate oxide down to near 30 Ã
.
Keywords :
Annealing; Boron; CMOS technology; Electrodes; Electrons; MOS capacitors; Silicon; Thickness measurement; Tunneling; Voltage;
Conference_Titel :
VLSI Technology, 1985. Digest of Technical Papers. Symposium on
Conference_Location :
Kobe, Japan
Print_ISBN :
4-930813-09-3