Title :
A New Isolation Technology for Bipolar VLSI Logic (IOP-L)
Author :
Goto, Hiroshi ; Takada, Tadakazu ; Nawata, Kazumasa ; Kanai, Yasunori
Author_Institution :
Bipolar Process Division, Fujitsu Limited 1015, Kamikodanaka, Nakahara, Kawasaki, 211 Japan
Keywords :
Delay; Etching; Fabrication; Isolation technology; Logic devices; Metallization; Parasitic capacitance; Substrates; Very large scale integration; Wiring;
Conference_Titel :
VLSI Technology, 1985. Digest of Technical Papers. Symposium on
Conference_Location :
Kobe, Japan
Print_ISBN :
4-930813-09-3
