Title :
Trench Isolation with Boron Implanted Side-Walls for Controlling Narrow-Width Effect of n-MOS Threshold Voltages
Author :
Fuse, G. ; Odanaka, S. ; Sasago, M. ; Fukumoto, M. ; Shinohara, S. ; Umimoto, H. ; Yabu, T. ; Ohzone, T. ; Ishihara, T.
Author_Institution :
Semiconductor Research Center Matsushita Electric Industrial Co., Ltd. Moriguchi-shi, Osaka, 570 Japan
Abstract :
Trench isolation technology with boron implanted vertical side-walls is presented andproved to be useful for completely suppressing humps in subthreshold current and controlling finely narrow width effects of n-MOS FETs. The technology is promising one to realize submicron trench isolation less than 0.5 ¿m.
Keywords :
Boron; Etching; FETs; Isolation technology; Scattering; Semiconductor films; Silicon; Substrates; Threshold voltage; Voltage control;
Conference_Titel :
VLSI Technology, 1985. Digest of Technical Papers. Symposium on
Conference_Location :
Kobe, Japan
Print_ISBN :
4-930813-09-3
