• DocumentCode
    472686
  • Title

    Technology for a 250V Monolithic Complementary MOSFFT LSJ with N+ Buried-Layer Protected CMOS Logic

  • Author

    Sakamoto, Kouzou ; Okabe, Takeaki ; Kimura, Masatoshi ; Satonaka, Koichiro ; Nishimura, Takanori

  • Author_Institution
    Central Research Lab., Hitachi Ltd., Kokubunji, Tokyo 185
  • fYear
    1986
  • fDate
    28-30 May 1986
  • Firstpage
    21
  • Lastpage
    22
  • Keywords
    Breakdown voltage; CMOS logic circuits; CMOS technology; Epitaxial layers; Isolation technology; Large scale integration; Logic design; Logic devices; MOSFET circuits; Protection;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 1986. Digest of Technical Papers. Symposium on
  • Conference_Location
    San Diego, CA, USA
  • Type

    conf

  • Filename
    4480350
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=472686