DocumentCode
47270
Title
Effect of Temperature Variation and Packaging on SOI MEMS Inductor With DRIE Trench on Low-Resistivity Substrate
Author
Bhattacharya, Avik ; Bhattacharyya, Tarun Kanti
Author_Institution
Adv. Technol. Dev. Centre, IIT Kharagpur, Kharagpur, India
Volume
61
Issue
2
fYear
2014
fDate
Feb. 2014
Firstpage
400
Lastpage
407
Abstract
This paper reports the implementation and wafer-level mechanical and RF testing of three types of MEMS inductor-octagonal, square, and circular; the latter over a temperature range -30°C to 150 °C. The devices were fabricated using a silicon on insulator process with deep reactive ion etching (DRIE) trench on a low-resistivity substrate (ρ = 1-10 Ω cm) and contains gold bond wire overpass to complete the inductance loop. The three inductors exhibited nominal inductance of 3.36, 12.15, and 3.29 nH with peak quality factor of 9.51, 6.91, and 7.26, respectively, and self-resonance frequency more than 10 GHz. Afterward, the inductors were packaged in a pin grid array package and postpackaging RF testing was carried out to analyze the effect of packaging on RF performance of the inductors.
Keywords
inductors; micromachining; micromechanical devices; silicon-on-insulator; sputter etching; DRIE trench; SOI MEMS inductor; deep reactive ion etching; gold bond wire overpass; inductance loop; low resistivity substrate; pin grid array package; postpackaging RF testing; self resonance frequency; silicon on insulator process; temperature -30 degC to 150 degC; temperature variation; wafer level mechanical testing; Inductors; Metals; Q-factor; Radio frequency; Silicon; Substrates; Wires; Bond wire; MEMS inductor; de-embedding; deep reactive ion etching (DRIE); low-resistivity (LR) substrate; micromachining; pin grid array (PGA) package; quality factor ($Q$ factor); silicon on insulator (SOI); temperature;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2013.2295535
Filename
6701332
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