DocumentCode
472734
Title
Analysis and Solution of a Yield-Limiting Patterned-Fail Mechanism in a 1 Mbit DRAM
Author
Nowak, E.J. ; Trickle, W.M.
Author_Institution
IBM General Technology Division Essex Junction, Vermont 05452
fYear
1987
fDate
22-23 May 1987
Firstpage
29
Lastpage
30
Keywords
Condition monitoring; Current measurement; Electric breakdown; FETs; Failure analysis; Pattern analysis; Phased arrays; Random access memory; Tail; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 1987. Digest of Technical Papers. Symposium on
Conference_Location
Karuizawa, Japan
Type
conf
Filename
4480406
Link To Document