Verification of an Analytic Model for Latchup in Epitaxial CMOS

This paper presents 2D simulation and experimental results for direct verification of an analytic model for the holding voltage in epitaxial CMOS that emphasized the role of conductivity modulation. Improvement in the holding voltage with lower doping in the anode and cathode regions, as predicted by the model, is compared with simulation results. The key concept of the model is the equivalence of a 2D thyristor to a p-i-n diode of the same geometry. This paper verifies this concept. Simulated as well as experimentally determined I-V characteristics of thyristors are compared with those of p-i-n diodes.