Title :
A 2 μm Hi-CMOS II Technology
Author :
Sakai, Yoshio ; Hayashida, Tetsuya ; Hashimoto, Norikazu ; Minato, Osamu ; Nagasawa, Koichi
Author_Institution :
Hitachi Central Research Laboratory Kokubunji, Tokyo, Japan
Abstract :
A high performance CMOS.( Hi-CMOS ) technology was first developed to overcome the power dissipation limitation of MOS LSIs.l) The low power, high speed 4K and 16K static memories have been developed by Hi-CMOS technology.2) 3) In this paper, a second generation high performance CMOS( Hi-CMOS II ) process and device technologies are described.
Keywords :
CMOS process; CMOS technology; Controllability; Dry etching; Inverters; MOSFETs; Microwave devices; Power dissipation; Random access memory; Threshold voltage;
Conference_Titel :
VLSI Technology, 1981. Digest of Technical Papers. Symposium on
Conference_Location :
Maui, HI, USA
