472843

Power-Up Triggering Conditions for Latch-Up in Bulk CMOS

Troutman, R.R. ; Zappe, H.P.

IBM General Technology Division Essex Junction, Vermont 05452

1982

1-3 Sept. 1982

52

53

Analytical models; CMOS integrated circuits; CMOS technology; Capacitance; Integrated circuit technology; Knee; Piecewise linear approximation; Resistors; Transient analysis; Voltage;

English

ieee

VLSI Technology, 1982. Digest of Technical Papers. Symposium on

Oiso, Japan

conf

4480574