472854

Pathfinder - A CAD Tool for Analyzing CMOS Latchup Structures

Faricelli, John ; Frey, Jeffrey

Cornell University School of Electrical Engineering Ithaca, NY 14853

1982

1-3 Sept. 1982

78

79

Bipolar integrated circuits; CMOS logic circuits; Circuit simulation; Data mining; Geometry; Logic devices; MOS devices; MOSFETs; Parasitic capacitance; Pathology;

English

ieee

VLSI Technology, 1982. Digest of Technical Papers. Symposium on

Oiso, Japan

conf

4480585