Title :
Parasitic Resistance Effects on Static MOS RAM
Author :
Shinohara, H. ; Anami, K. ; Yoshimoto, M. ; Hirata, Y. ; Nakano, T.
Author_Institution :
LSI R&D Laboratory, Mitsubishi Electric Corp. Itami, Japan
Keywords :
Circuits; Electric resistance; Inverters; Laboratories; Large scale integration; Random access memory; Read-write memory; Research and development; Very large scale integration; Voltage;
Conference_Titel :
VLSI Technology, 1982. Digest of Technical Papers. Symposium on
Conference_Location :
Oiso, Japan