• DocumentCode
    472873
  • Title

    Sicos - A High Performance Bipolar Structure for VLSI

  • Author

    Nakazato, Kazuo ; Nakamura, Tohru ; Miyazaki, Takao ; Okabe, Takahiro ; Nagata, Minoru

  • Author_Institution
    Central Research Laboratory, Hitachi Ltd., Kokubunji, Tokyo 185
  • fYear
    1982
  • fDate
    1-3 Sept. 1982
  • Firstpage
    118
  • Lastpage
    119
  • Keywords
    Bipolar transistors; Delay effects; Electrodes; Epitaxial layers; Laboratories; Logic circuits; Logic gates; Parasitic capacitance; Substrates; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 1982. Digest of Technical Papers. Symposium on
  • Conference_Location
    Oiso, Japan
  • Type

    conf

  • Filename
    4480604
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=472873