• DocumentCode
    472877
  • Title

    A Gate Array CAD System and Future Tasks in the Field

  • Author

    Ishii, J. ; Sugiura, Y. ; Suehiro, Y.

  • Author_Institution
    Fujitsu Ltd. Kawasaki, Japan
  • fYear
    1983
  • fDate
    13-15 Sept. 1983
  • Firstpage
    12
  • Lastpage
    15
  • Keywords
    Capacitance; Design automation; Integrated circuit interconnections; LAN interconnection; Logic arrays; Logic design; Programmable logic arrays; Routing; Testing; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 1983. Digest of Technical Papers. Symposium on
  • Conference_Location
    Maui, HI, USA
  • Print_ISBN
    4-930813-05-0
  • Type

    conf

  • Filename
    4480616