DocumentCode :
472886
Title :
A 64K Pseudo Static RAM with N-Well CMOS Technology
Author :
Tsuchida, S. ; Ishioka, H. ; Okuyama, Y. ; Tsujide, T. ; Tameda, M.
Author_Institution :
1st LSI Division, NEC Corporation Sagamihara Kanagawa 229, Japan
fYear :
1983
fDate :
13-15 Sept. 1983
Firstpage :
36
Lastpage :
37
Abstract :
A 64K Pseude static RAM has been realized using direct step-on-wafer lithography technology and dry processing technology. Most outstanding feature of this RAM is low supply current during self refresh operation. The electrical performance is compatible with a standard 64K x 1 DRAM.
Keywords :
CMOS technology; Circuits; Content addressable storage; Current supplies; Degradation; Impact ionization; Random access memory; Read-write memory; Substrates; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 1983. Digest of Technical Papers. Symposium on
Conference_Location :
Maui, HI, USA
Print_ISBN :
4-930813-05-0
Type :
conf
Filename :
4480625
Link To Document :
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