• DocumentCode
    472888
  • Title

    N- and P-Well Optimization for High Speed N-Epitaxy CMOS Circuits

  • Author

    Schwabe, U. ; Jacobs, E.P. ; Takacs, D. ; Bürker, U.

  • Author_Institution
    Siemens AG, Central Research and Development, Microelectronics, D-8000 Munich 83, Otto-Hahn-Ring 6, FRG
  • fYear
    1983
  • fDate
    13-15 Sept. 1983
  • Firstpage
    42
  • Lastpage
    43
  • Keywords
    Breakdown voltage; Circuits; Jacobian matrices; Length measurement; Parasitic capacitance; Propagation delay; Ring oscillators; Temperature; Threshold voltage; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 1983. Digest of Technical Papers. Symposium on
  • Conference_Location
    Maui, HI, USA
  • Print_ISBN
    4-930813-05-0
  • Type

    conf

  • Filename
    4480628
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=472888