DocumentCode
472916
Title
Sub-Micron NMOS Technology for High Speed VLSI
Author
Smith, George E.
Author_Institution
Bell Laboratories Murray Hill, New Jersey 07974
fYear
1983
fDate
13-15 Sept. 1983
Firstpage
102
Lastpage
103
Abstract
One micron NMOS technology has been demonstrated as a viable high speed technology. Simulations and preliminary experiments show that the technology can be extended down to 0.1 ¿m but no further. New concepts will be needed to reach the ultimate limit of 0.02 ¿m.
Keywords
Clocks; Electron beams; Etching; Fabrication; Integrated circuit interconnections; Lithography; MOS devices; Space technology; Very large scale integration; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 1983. Digest of Technical Papers. Symposium on
Conference_Location
Maui, HI, USA
Print_ISBN
4-930813-05-0
Type
conf
Filename
4480657
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