Title :
A High Latch-Up Immunity Full CMOS RAM
Author :
Anami, K. ; Yoshimoto, M. ; Yoshihara, T. ; Nagao, S. ; Akasaka, Y. ; Nakano, T.
Author_Institution :
LSI R & D Laboratory, Mitsubishi Electric Corporation 4-1 Mizuhara, Itami 664 Japan
Keywords :
CMOS technology; Circuit testing; Costs; Laboratories; Large scale integration; Power supplies; Production; Random access memory; Read-write memory; Voltage;
Conference_Titel :
VLSI Technology, 1984. Digest of Technical Papers. Symposium on
Conference_Location :
San Diego, CA, USA
Print_ISBN :
4-930813-08-5
