DocumentCode
472945
Title
A 1.1 NS Access Time 4 Kb Bipolar RAM Using Super Self-Aligned Technology
Author
Miyanaga, H. ; Kobayashi, Y. ; Konaka, S. ; Yamamoto, Y. ; Sakai, T.
Author_Institution
Atsugi Electrical Communication Laboratory, NTT 1839, Ono, Atsugi-shi, Kanagawa, Japan, 243-01
fYear
1984
fDate
10-12 Sept. 1984
Firstpage
50
Lastpage
51
Keywords
Circuits; Electrodes; Fabrication; Insulation; Metallization; Parasitic capacitance; Power dissipation; Random access memory; Read-write memory; Resistors;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 1984. Digest of Technical Papers. Symposium on
Conference_Location
San Diego, CA, USA
Print_ISBN
4-930813-08-5
Type
conf
Filename
4480694
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