• DocumentCode
    473267
  • Title

    Busbar Protection Design for Economy of Panel Space, Minimised Power Consumption, and Advanced Performance

  • Author

    Grasset, H. ; Best, Chris

  • Author_Institution
    AREVA T&D, Lattes
  • fYear
    2008
  • fDate
    17-20 March 2008
  • Firstpage
    546
  • Lastpage
    550
  • Abstract
    Busbar protection is an essential component in power system design, protecting the most important system node for network stability and security. As busbar protection technology has progressed, each new hardware platform has allowed an incremental improvement in protection performance, as well as easier user communication, information and operation. Most notably the advances in recent years have been derived from the ability to implement busbar characteristics by means of numerical algorithms in a digital relay. This paper describes the design approach for a centralised busbar protection scheme - whereby the relay is housed in the minimum of panel/cubicle space that would use the newest and most compact analogue input board designs (for CT inputs), with step enhancements in communication benefits to the user via remote HMI and control systems. The paper discusses how hardware design would be oriented, given the large density of CT connections, and binary I/O status information that must be integrated in busbar protection solutions. Space saving and integration of the latest protocol: IEC61850-8-1 also modifies the mindset and design approach. Later sections give examples of how the busbar relays can be applied at all system voltages, for the diverse installed base of busbar topologies, and with any CT ratio or characteristics. The paper summarises that it is possible to implement a fully- integrated and compact busbar protection relay for universal application, saving space and power and increasing the network reliability by easing the day to day use of it. The philosophy is that a product which is simpler and easier to understand is less likely to be prone to incorrect application or setting errors, and the paper describes how settings can be minimised and wizards applied such as to "self-set" as far as practical.
  • Keywords
    busbars; power consumption; power system protection; relay protection; analogue input board designs; binary I/O status information; busbar relays; busbar topologies; centralised busbar protection scheme; compact busbar protection relay; hardware design; panel space; power consumption; Contacts; Control systems; Insulated gate bipolar transistors; Maintenance engineering; Relays; Substations; Topology;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Developments in Power System Protection, 2008. DPSP 2008. IET 9th International Conference on
  • Conference_Location
    Glasgow
  • ISSN
    0537-9989
  • Print_ISBN
    978-0-86341-902-7
  • Type

    conf

  • Filename
    4497044