DocumentCode :
474407
Title :
Sparse matrix computations on manycore GPU’s
Author :
Garland, Michael
Author_Institution :
NVIDIA Corp., Santa Clara, CA
fYear :
2008
fDate :
8-13 June 2008
Firstpage :
2
Lastpage :
6
Abstract :
Modern microprocessors are becoming increasingly parallel devices, and GPUs are at the leading edge of this trend. Designing parallel algorithms for manycore chips like the GPU can present interesting challenges, particularly for computations on sparse data structures. One particularly common example is the collection of sparse matrix solvers and combinatorial graph algorithms that form the core of many physical simulation techniques. Although seemingly irregular, these operations can often be implemented with data parallel operations that map very well to massively parallel processors.
Keywords :
computer graphic equipment; data structures; graph theory; mathematics computing; microprocessor chips; parallel algorithms; sparse matrices; GPU computing; combinatorial graph algorithms; data-parallel algorithm design; graphics processing units; manycore GPU; modern microprocessors; parallel devices; parallel processors; parallel programming; sparse data structures; sparse matrix computations; sparse matrix solvers; sparse matrix-vector multiplication; Algorithm design and analysis; Concurrent computing; Graphics; Kernel; Microprocessors; Parallel algorithms; Parallel processing; Parallel programming; Sparse matrices; Yarn; GPU computing; data-parallel algorithms; parallel programming; shortest path algorithms; sparse matrix-vector multiplication;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2008. DAC 2008. 45th ACM/IEEE
Conference_Location :
Anaheim, CA
ISSN :
0738-100X
Print_ISBN :
978-1-60558-115-6
Type :
conf
Filename :
4555771
Link To Document :
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